%0 Journal Article %1 journals/tcad/AcharyaSMSDSMRD23 %A Acharya, Lomash Chandra %A Sharma, Arvind Kumar %A Mishra, Neeraj %A Singh, Khoirom Johnson %A Dargupally, Mahipal %A Shabarish, Nayakanti Sai %A Mandal, Ajoy %A Ramakrishnan, Venkatraman %A Dasgupta, Sudeb %A Bulusu, Anand %D 2023 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 8 %P 2657-2663 %T Aging-Aware Timing Model of CMOS Inverter: Path Level Timing Performance and Its Impact on the Logical Effort. %U http://dblp.uni-trier.de/db/journals/tcad/tcad42.html#AcharyaSMSDSMRD23 %V 42

@article{journals/tcad/AcharyaSMSDSMRD23, added-at = {2023-08-05T00:00:00.000+0200}, author = {Acharya, Lomash Chandra and Sharma, Arvind Kumar and Mishra, Neeraj and Singh, Khoirom Johnson and Dargupally, Mahipal and Shabarish, Nayakanti Sai and Mandal, Ajoy and Ramakrishnan, Venkatraman and Dasgupta, Sudeb and Bulusu, Anand}, biburl = {https://www.bibsonomy.org/bibtex/20082f5253c02948c10966fc6759227e4/dblp}, ee = {https://doi.org/10.1109/TCAD.2022.3231173}, interhash = {bf13c43cce0f99a6c2455a415d6a9b58}, intrahash = {0082f5253c02948c10966fc6759227e4}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 8, pages = {2657-2663}, timestamp = {2024-04-08T19:45:50.000+0200}, title = {Aging-Aware Timing Model of CMOS Inverter: Path Level Timing Performance and Its Impact on the Logical Effort.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad42.html#AcharyaSMSDSMRD23}, volume = 42, year = 2023 }