%0 Conference Paper %1 conf/isscc/CurranMSSFCWVG06 %A Curran, Brian W. %A McCredie, Bradley D. %A Sigal, Leonid %A Schwarz, Eric M. %A Fleischer, Bruce M. %A Chan, Yuen H. %A Webber, D. %A Vaden, Vaden %A Goyal, A. %B ISSCC %D 2006 %I IEEE %K dblp %P 1728-1734 %T 4GHz+ low-latency fixed-point and binary floating-point execution units for the POWER6 processor. %U http://dblp.uni-trier.de/db/conf/isscc/isscc2006.html#CurranMSSFCWVG06 %@ 1-4244-0079-1

@inproceedings{conf/isscc/CurranMSSFCWVG06, added-at = {2020-06-09T00:00:00.000+0200}, author = {Curran, Brian W. and McCredie, Bradley D. and Sigal, Leonid and Schwarz, Eric M. and Fleischer, Bruce M. and Chan, Yuen H. and Webber, D. and Vaden, Vaden and Goyal, A.}, biburl = {https://www.bibsonomy.org/bibtex/27b7e1c7e9a8f01eb6434919120874a6d/dblp}, booktitle = {ISSCC}, crossref = {conf/isscc/2006}, ee = {https://doi.org/10.1109/ISSCC.2006.1696229}, interhash = {91731b7f3cb576fa3c46e1b3dc201b3a}, intrahash = {7b7e1c7e9a8f01eb6434919120874a6d}, isbn = {1-4244-0079-1}, keywords = {dblp}, pages = {1728-1734}, publisher = {IEEE}, timestamp = {2024-04-09T20:43:22.000+0200}, title = {4GHz+ low-latency fixed-point and binary floating-point execution units for the POWER6 processor.}, url = {http://dblp.uni-trier.de/db/conf/isscc/isscc2006.html#CurranMSSFCWVG06}, year = 2006 }