A novel method for on-line fault detection and location in network-on-chip (NoC) communication fabrics is introduced. This approach is able to distinguish between faults in the communication links and faults in the NoC switches. The idea is based on the use of code-disjoint routing elements, combined with parity check encoding for the inter-switch links. We analyze the effect of our method on relevant performance parameters - power, latency, and throughput. Experiments show that our approach is effective and requires minimal modifications of the existing design methods for NoC interconnects
Description
IEEE Xplore Abstract - On-line fault detection and location for NoC interconnects
%0 Conference Paper
%1 grecu2006online
%A Grecu, C.
%A Ivanov, A.
%A Saleh, R.
%A Sogomonyan, E.S.
%A Pande, P.P.
%B On-Line Testing Symposium, 2006. IOLTS 2006. 12th IEEE International
%D 2006
%K fault noc reliability tolerant
%P 6 pp.-
%R 10.1109/IOLTS.2006.44
%T On-line fault detection and location for NoC interconnects
%U http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1655534
%X A novel method for on-line fault detection and location in network-on-chip (NoC) communication fabrics is introduced. This approach is able to distinguish between faults in the communication links and faults in the NoC switches. The idea is based on the use of code-disjoint routing elements, combined with parity check encoding for the inter-switch links. We analyze the effect of our method on relevant performance parameters - power, latency, and throughput. Experiments show that our approach is effective and requires minimal modifications of the existing design methods for NoC interconnects
@inproceedings{grecu2006online,
abstract = {A novel method for on-line fault detection and location in network-on-chip (NoC) communication fabrics is introduced. This approach is able to distinguish between faults in the communication links and faults in the NoC switches. The idea is based on the use of code-disjoint routing elements, combined with parity check encoding for the inter-switch links. We analyze the effect of our method on relevant performance parameters - power, latency, and throughput. Experiments show that our approach is effective and requires minimal modifications of the existing design methods for NoC interconnects},
added-at = {2015-02-05T17:21:32.000+0100},
author = {Grecu, C. and Ivanov, A. and Saleh, R. and Sogomonyan, E.S. and Pande, P.P.},
biburl = {https://www.bibsonomy.org/bibtex/2cffcb3618b4c89590a735708d13a680a/eberle18},
booktitle = {On-Line Testing Symposium, 2006. IOLTS 2006. 12th IEEE International},
description = {IEEE Xplore Abstract - On-line fault detection and location for NoC interconnects},
doi = {10.1109/IOLTS.2006.44},
interhash = {a1fb9c451a16a75122ea253b936c4fea},
intrahash = {cffcb3618b4c89590a735708d13a680a},
keywords = {fault noc reliability tolerant},
pages = {6 pp.-},
timestamp = {2015-02-05T17:21:32.000+0100},
title = {On-line fault detection and location for NoC interconnects},
url = {http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1655534},
year = 2006
}