%0 Conference Paper %1 conf/newcas/IizukaS13 %A Iizuka, Minoru %A Saito, Hiroshi %B NEWCAS %D 2013 %I IEEE %K dblp %P 1-4 %T A floorplan method for ASIC designs of asynchronous circuits with bundled-data implementation. %U http://dblp.uni-trier.de/db/conf/newcas/newcas2013.html#IizukaS13 %@ 978-1-4799-0618-5

@inproceedings{conf/newcas/IizukaS13, added-at = {2017-05-24T00:00:00.000+0200}, author = {Iizuka, Minoru and Saito, Hiroshi}, biburl = {https://www.bibsonomy.org/bibtex/2d98a330f380b52383cdfcf679b30d5ba/dblp}, booktitle = {NEWCAS}, crossref = {conf/newcas/2013}, ee = {https://doi.org/10.1109/NEWCAS.2013.6573596}, interhash = {4780e80e1709b1c5e5bc3ea7c8e7e1a5}, intrahash = {d98a330f380b52383cdfcf679b30d5ba}, isbn = {978-1-4799-0618-5}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2019-10-17T22:47:55.000+0200}, title = {A floorplan method for ASIC designs of asynchronous circuits with bundled-data implementation.}, url = {http://dblp.uni-trier.de/db/conf/newcas/newcas2013.html#IizukaS13}, year = 2013 }