%0 Journal Article %1 noauthororeditor %A Haramkar, Gaurav %A Patil, Rohita P %A Andankar, Renuka %D 2016 %J International Journal of Microelectronics Engineering %K (Advanced (Figure ADS CMOS Design FOM Merit) NMOS System) VCO cross-coupled noise of phase process %N 4 %P 1-9 %R 10.5121 %T A 2.4 GHZ FULLY INTEGRATED LC VCO DESIGN USING 130 NM CMOS TECHNOLOGY %U http://airccse.com/ijme/papers/2416ijme01.pdf %V 2 %X In this paper, a 2.4 GHz fully integrated LC voltage controlled oscillator (VCO) for RF wireless applications is presented. The VCO circuit is designed using TSMC 130 nm CMOS process. The circuit design is based on differential oscillator structure with cross-coupled NMOS transistors which achieves low power dissipation and low phase noise. Simulation and layout of the VCO is carried out using ADS Tool. The VCO operates from a supply voltage of 1.8 V and consumes 19.62 mW of power. After simulating the proposed design the VCO shows a phase noise of -128.68 dBc/Hz at 1 MHz offset frequency from a 2.4 GHz carrier signal. The frequency range of the VCO is from 2.36 GHz to 2.61 GHz when the control voltage changes from 0 to 2 V. The FOM is obtained as -183.73 dBc/Hz. The total chip area, including pads, occupies 0.7 mm × 0.7 mm.

@article{noauthororeditor, abstract = {In this paper, a 2.4 GHz fully integrated LC voltage controlled oscillator (VCO) for RF wireless applications is presented. The VCO circuit is designed using TSMC 130 nm CMOS process. The circuit design is based on differential oscillator structure with cross-coupled NMOS transistors which achieves low power dissipation and low phase noise. Simulation and layout of the VCO is carried out using ADS Tool. The VCO operates from a supply voltage of 1.8 V and consumes 19.62 mW of power. After simulating the proposed design the VCO shows a phase noise of -128.68 dBc/Hz at 1 MHz offset frequency from a 2.4 GHz carrier signal. The frequency range of the VCO is from 2.36 GHz to 2.61 GHz when the control voltage changes from 0 to 2 V. The FOM is obtained as -183.73 dBc/Hz. The total chip area, including pads, occupies 0.7 mm × 0.7 mm. }, added-at = {2017-10-27T08:02:21.000+0200}, author = {Haramkar, Gaurav and Patil, Rohita P and Andankar, Renuka}, biburl = {https://www.bibsonomy.org/bibtex/25108779bf94c71dde50dd4652a79bd82/michelrude}, doi = {10.5121}, interhash = {4841baaae5862854a97150a08cbc55ce}, intrahash = {5108779bf94c71dde50dd4652a79bd82}, issn = {2455-2925}, journal = {International Journal of Microelectronics Engineering}, keywords = {(Advanced (Figure ADS CMOS Design FOM Merit) NMOS System) VCO cross-coupled noise of phase process}, language = {English}, month = {October}, number = 4, pages = {1-9}, timestamp = {2017-10-27T08:02:21.000+0200}, title = {A 2.4 GHZ FULLY INTEGRATED LC VCO DESIGN USING 130 NM CMOS TECHNOLOGY}, url = {http://airccse.com/ijme/papers/2416ijme01.pdf}, volume = 2, year = 2016 }