%0 Journal Article %1 journals/tcad/ChengZP24 %A Cheng, Zeming %A Zhang, Bo %A Pedram, Massoud %D 2024 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 2 %P 492-505 %T A High-Performance, Conflict-Free Memory-Access Architecture for Modular Polynomial Multiplication. %U http://dblp.uni-trier.de/db/journals/tcad/tcad43.html#ChengZP24 %V 43

@article{journals/tcad/ChengZP24, added-at = {2024-02-29T00:00:00.000+0100}, author = {Cheng, Zeming and Zhang, Bo and Pedram, Massoud}, biburl = {https://www.bibsonomy.org/bibtex/2a22b6c0da750923943bcc181af19cfe9/dblp}, ee = {https://doi.org/10.1109/TCAD.2023.3316988}, interhash = {4eefba137b1911d14819ef785f8f0ec9}, intrahash = {a22b6c0da750923943bcc181af19cfe9}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, month = {February}, number = 2, pages = {492-505}, timestamp = {2024-04-08T19:45:30.000+0200}, title = {A High-Performance, Conflict-Free Memory-Access Architecture for Modular Polynomial Multiplication.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad43.html#ChengZP24}, volume = 43, year = 2024 }