%0 Journal Article %1 journals/jssc/ChenTTTCC10 %A Chen, Tse-Wei %A Tang, Chi-Sun %A Tsai, Sung-Fang %A Tsai, Chen-Han %A Chien, Shao-Yi %A Chen, Liang-Gee %D 2010 %J IEEE J. Solid State Circuits %K dblp %N 11 %P 2321-2329 %T Tera-Scale Performance Machine Learning SoC (MLSoC) With Dual Stream Processor Architecture for Multimedia Content Analysis. %U http://dblp.uni-trier.de/db/journals/jssc/jssc45.html#ChenTTTCC10 %V 45

@article{journals/jssc/ChenTTTCC10, added-at = {2021-07-14T00:00:00.000+0200}, author = {Chen, Tse-Wei and Tang, Chi-Sun and Tsai, Sung-Fang and Tsai, Chen-Han and Chien, Shao-Yi and Chen, Liang-Gee}, biburl = {https://www.bibsonomy.org/bibtex/2f894cb647ccd5439aab748b98128c766/dblp}, ee = {https://doi.org/10.1109/JSSC.2010.2067910}, interhash = {84a0ce8306f773e632769d93be9f085e}, intrahash = {f894cb647ccd5439aab748b98128c766}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 11, pages = {2321-2329}, timestamp = {2024-04-08T10:43:29.000+0200}, title = {Tera-Scale Performance Machine Learning SoC (MLSoC) With Dual Stream Processor Architecture for Multimedia Content Analysis.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc45.html#ChenTTTCC10}, volume = 45, year = 2010 }