Please log in to take part in the discussion (add own reviews or comments).
Cite this publication
More citation styles
- please select -
%0 Journal Article
%1 journals/jssc/RossiCEMTMGPLCF22
%A Rossi, Davide
%A Conti, Francesco
%A Eggimann, Manuel
%A Mauro, Alfio Di
%A Tagliavini, Giuseppe
%A Mach, Stefan
%A Guermandi, Marco
%A Pullini, Antonio
%A Loi, Igor
%A Chen, Jie
%A Flamand, Eric
%A Benini, Luca
%D 2022
%J IEEE J. Solid State Circuits
%K dblp
%N 1
%P 127-139
%T Vega: A Ten-Core SoC for IoT Endnodes With DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode.
%U http://dblp.uni-trier.de/db/journals/jssc/jssc57.html#RossiCEMTMGPLCF22
%V 57
@article{journals/jssc/RossiCEMTMGPLCF22,
added-at = {2022-01-08T00:00:00.000+0100},
author = {Rossi, Davide and Conti, Francesco and Eggimann, Manuel and Mauro, Alfio Di and Tagliavini, Giuseppe and Mach, Stefan and Guermandi, Marco and Pullini, Antonio and Loi, Igor and Chen, Jie and Flamand, Eric and Benini, Luca},
biburl = {https://www.bibsonomy.org/bibtex/2c86f00ce22327207c9fa83f3880deade/dblp},
ee = {https://doi.org/10.1109/JSSC.2021.3114881},
interhash = {a152c23f29824f436648744aae0a10cb},
intrahash = {c86f00ce22327207c9fa83f3880deade},
journal = {IEEE J. Solid State Circuits},
keywords = {dblp},
number = 1,
pages = {127-139},
timestamp = {2024-04-08T10:44:07.000+0200},
title = {Vega: A Ten-Core SoC for IoT Endnodes With DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode.},
url = {http://dblp.uni-trier.de/db/journals/jssc/jssc57.html#RossiCEMTMGPLCF22},
volume = 57,
year = 2022
}