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Disambiguation of "Eggimann, Manuel"

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Vega: A Ten-Core SoC for IoT Endnodes With DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode.

, , , , , , , , , , , and . IEEE J. Solid State Circuits, 57 (1): 127-139 (2022)

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Pierre Eggimann

Manuel

Manuel Wiemeyer

Manuel Engesser

Manuel Otte

 

Other publications of authors with the same name

Hydra: An Accelerator for Real-Time Edge-Aware Permeability Filtering in 65nm CMOS., , , , , , and . CoRR, (2017)Hydra: An Accelerator for Real-Time Edge-Aware Permeability Filtering in 65nm CMOS., , , , , , and . ISCAS, page 1-5. IEEE, (2018)A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing., , , , , , , , , and 7 other author(s). ISSCC, page 326-327. IEEE, (2023)TinyRadarNN: Combining Spatial and Temporal Convolutional Neural Networks for Embedded Gesture Recognition With Short Range Radars., , , , , and . IEEE Internet Things J., 8 (13): 10336-10346 (2021)Low Power Embedded Gesture Recognition Using Novel Short-Range Radar Sensors., , , , and . IEEE SENSORS, page 1-4. IEEE, (2019)Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC with 2-to-8b DNN Acceleration and 30%-Boost Adaptive Body Biasing., , , , , , , , and . CoRR, (2023)Siracusa: A Low-Power On-Sensor RISC-V SoC for Extended Reality Visual Processing in 16nm CMOS., , , , , , , , , and 2 other author(s). ESSCIRC, page 217-220. IEEE, (2023)An Energy Efficient System for Touch Modality Classification in Electronic Skin Applications., , , , , , and . ISCAS, page 1-4. IEEE, (2019)HR-SAR-Net: A Deep Neural Network for Urban Scene Segmentation from High-Resolution SAR Data., , , , and . CoRR, (2019)Vega: A Ten-Core SoC for IoT Endnodes With DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 57 (1): 127-139 (2022)