%0 Conference Paper %1 conf/aspdac/DharPLKMSMHHS21 %A Dhar, Tonmoy %A Poojary, Jitesh %A Li, Yaguang %A Kunal, Kishor %A Madhusudan, Meghna %A Sharma, Arvind K. %A Manasi, Susmita Dey %A Hu, Jiang %A Harjani, Ramesh %A Sapatnekar, Sachin S. %B ASP-DAC %D 2021 %I ACM %K dblp %P 158-163 %T Fast and Efficient Constraint Evaluation of Analog Layout Using Machine Learning Models. %U http://dblp.uni-trier.de/db/conf/aspdac/aspdac2021.html#DharPLKMSMHHS21 %@ 978-1-4503-7999-1

@inproceedings{conf/aspdac/DharPLKMSMHHS21, added-at = {2023-09-30T00:00:00.000+0200}, author = {Dhar, Tonmoy and Poojary, Jitesh and Li, Yaguang and Kunal, Kishor and Madhusudan, Meghna and Sharma, Arvind K. and Manasi, Susmita Dey and Hu, Jiang and Harjani, Ramesh and Sapatnekar, Sachin S.}, biburl = {https://www.bibsonomy.org/bibtex/2b33b1965b5d97321f4bf6a3982598df0/dblp}, booktitle = {ASP-DAC}, crossref = {conf/aspdac/2021}, ee = {https://doi.org/10.1145/3394885.3431547}, interhash = {ac06bfe4f62ac6d784936138e6ad09cd}, intrahash = {b33b1965b5d97321f4bf6a3982598df0}, isbn = {978-1-4503-7999-1}, keywords = {dblp}, pages = {158-163}, publisher = {ACM}, timestamp = {2024-04-09T13:33:01.000+0200}, title = {Fast and Efficient Constraint Evaluation of Analog Layout Using Machine Learning Models.}, url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2021.html#DharPLKMSMHHS21}, year = 2021 }