%0 Conference Paper %1 conf/fpga/HuangWZLLJTIY17 %A Huang, Zhihong %A Wei, Xing %A Zgheib, Grace %A Li, Wei %A Lin, Yu %A Jiang, Zhenghong %A Tu, Kaihui %A Ienne, Paolo %A Yang, Haigang %B FPGA %D 2017 %E Greene, Jonathan W. %E Anderson, Jason Helge %I ACM %K dblp %P 135-140 %T NAND-NOR: A Compact, Fast, and Delay Balanced FPGA Logic Element. %U http://dblp.uni-trier.de/db/conf/fpga/fpga2017.html#HuangWZLLJTIY17 %@ 978-1-4503-4354-1

@inproceedings{conf/fpga/HuangWZLLJTIY17, added-at = {2024-08-14T00:00:00.000+0200}, author = {Huang, Zhihong and Wei, Xing and Zgheib, Grace and Li, Wei and Lin, Yu and Jiang, Zhenghong and Tu, Kaihui and Ienne, Paolo and Yang, Haigang}, biburl = {https://www.bibsonomy.org/bibtex/22b2c6f7e7710738d67ba2ef81a0539c3/dblp}, booktitle = {FPGA}, crossref = {conf/fpga/2017}, editor = {Greene, Jonathan W. and Anderson, Jason Helge}, ee = {http://dl.acm.org/citation.cfm?id=3021750}, interhash = {bc267b850362d83f9384ef9701da3cb7}, intrahash = {2b2c6f7e7710738d67ba2ef81a0539c3}, isbn = {978-1-4503-4354-1}, keywords = {dblp}, pages = {135-140}, publisher = {ACM}, timestamp = {2024-08-19T07:41:27.000+0200}, title = {NAND-NOR: A Compact, Fast, and Delay Balanced FPGA Logic Element.}, url = {http://dblp.uni-trier.de/db/conf/fpga/fpga2017.html#HuangWZLLJTIY17}, year = 2017 }