%0 Conference Paper %1 conf/socc/TheocharidesLVIS04 %A Theocharides, Theocharis %A Link, Greg M. %A Vijaykrishnan, Narayanan %A Irwin, Mary Jane %A Srikantam, Vamsi %B SoCC %D 2004 %I IEEE %K dblp %P 191-194 %T A generic reconfigurable neural network architecture as a network on chip. %U http://dblp.uni-trier.de/db/conf/socc/socc2004.html#TheocharidesLVIS04 %@ 0-7803-8445-8

@inproceedings{conf/socc/TheocharidesLVIS04, added-at = {2012-12-19T00:00:00.000+0100}, author = {Theocharides, Theocharis and Link, Greg M. and Vijaykrishnan, Narayanan and Irwin, Mary Jane and Srikantam, Vamsi}, biburl = {https://www.bibsonomy.org/bibtex/2400d925d1f1dfcb8011c6a7f16d25d69/dblp}, booktitle = {SoCC}, crossref = {conf/socc/2004}, ee = {http://dx.doi.org/10.1109/SOCC.2004.1362404}, interhash = {bdcc6c250e3c3d6a4f3a6172423695c2}, intrahash = {400d925d1f1dfcb8011c6a7f16d25d69}, isbn = {0-7803-8445-8}, keywords = {dblp}, pages = {191-194}, publisher = {IEEE}, timestamp = {2012-12-20T11:35:55.000+0100}, title = {A generic reconfigurable neural network architecture as a network on chip.}, url = {http://dblp.uni-trier.de/db/conf/socc/socc2004.html#TheocharidesLVIS04}, year = 2004 }