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Disambiguation of "Chen, Yin-Nien"

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High-performance 0.6V VMIN 55nm 1.0Mb 6T SRAM with adaptive BL bleeder.

, , , , , , , , , , , , , , , and . ISCAS, page 1831-1834. IEEE, (2012)

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Yin-Zu Chen

Jocelyn Ssu-Yin Chen

Lynn Tschun Nien

Wan-Nien Yao

Gia Nien Wu

 

Other publications of authors with the same name

Ultra-low voltage mixed TFET-MOSFET 8T SRAM cell., , , , and . ISLPED, page 255-258. ACM, (2014)Evaluation of TFET and FinFET devices and 32-Bit CLA circuits considering work function variation and line-edge roughness., , , , , and . ISCAS, page 2325-2328. IEEE, (2015)Evaluation of Sub-0.2 V High-Speed Low-Power Circuits Using Hetero-Channel MOSFET and Tunneling FET Devices., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (12): 3339-3347 (2014)A comparative analysis of tunneling FET circuit switching characteristics and SRAM stability and performance., , , , , , and . ESSDERC, page 157-160. IEEE, (2012)Single-trap-induced random telegraph noise for FinFET, Si/Ge Nanowire FET, Tunnel FET, SRAM and logic circuits., , , , , and . Microelectron. Reliab., 54 (4): 698-711 (2014)Variability Analysis of Sense Amplifier for FinFET Subthreshold SRAM Applications., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 59-II (12): 878-882 (2012)Exploration and evaluation of low-dropout linear voltage regulator with FinFET, TFET and hybrid TFET-FinFET implementations., , , , and . ISCAS, page 1-4. IEEE, (2017)Impacts of single trap induced random telegraph noise on Si and Ge nanowire FETs, 6T SRAM cells and logic circuits., , , , , and . ICICDT, page 61-64. IEEE, (2013)Impacts of random telegraph noise on the analog properties of FinFET and trigate devices and Widlar current source., , , , , , and . ICICDT, page 1-4. IEEE, (2012)Evaluation of 32-Bit carry-look-ahead adder circuit with hybrid tunneling FET and FinFET devices., , , , , and . ICICDT, page 1-4. IEEE, (2015)