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An out-of-order superscalar processor on FPGA: The ReOrder Buffer design., , , and . DATE, page 1549-1554. IEEE, (2012)Morpheo: A high-performance processor generator for a FPGA implementation., , , and . DASIP, page 27-34. IEEE, (2011)Smart Security Management in Secure Devices., , , , , , and . IACR Cryptology ePrint Archive, (2015)MemOpLight: Leveraging application feedback to improve container memory consolidation., , , , , and . NCA, page 1-10. IEEE, (2020)GECOS : Mécanisme de synchronisation passant à l'échelle à plusieurs lecteurs et un écrivain pour structures chaînées., , , and . Technique et Science Informatiques, 34 (1-2): 53-78 (2015)Protocol and Performance Analysis of the MPC Parallel Computer., , , , , , , , and . IPDPS, page 52. IEEE Computer Society, (2001)High Level Synthesis Methodology from C to FPGA Used for a Network Protocol Communication., , , and . IEEE International Workshop on Rapid System Prototyping, page 103-108. IEEE Computer Society, (2004)A Formally Verified Static Hypervisor with Hardware Support for a Many-Core Chip., , and . Euro-Par Workshops, volume 8374 of Lecture Notes in Computer Science, page 801-811. Springer, (2013)Highlighting the Container Memory Consolidation Problems in Linux., , , , , and . NCA, page 1-4. IEEE, (2019)Implementation of Complex Strategies of Security Insecure Embedded Systems., , , , , , and . NTMS, page 1-5. IEEE, (2011)