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Variation-aware Fault Modeling and Test Generation for STT-MRAM., , , , and . IOLTS, page 80-83. IEEE, (2019)Fault modeling and test algorithm creation strategy for FinFET-based memories., , , and . VTS, page 1-6. IEEE Computer Society, (2014)An Efficient External Memory Test Solution: Case Study for HPC Application., , , , , , , and . VTS, page 1-4. IEEE, (2023)Utilizing ECC Analytics to Improve Memory Lifecycle Management., , , and . ITC, page 383-387. IEEE, (2023)Addressing the Combined Effect of Transistor and Interconnect Aging in SRAM towards Silicon Lifecycle Management., , , , , , , , and . VTS, page 1-5. IEEE, (2024)Impact of parameter variations on FinFET faults., , and . VTS, page 1-4. IEEE Computer Society, (2015)Innovative Practices on In-System Test and Reliability of Memories., , , , , , , , , and 3 other author(s). VTS, page 1. IEEE, (2019)An Efficient Test Strategy for Detection of Electromigration Impact in Advanced FinFET Memories., , , , and . ITC, page 650-655. IEEE, (2022)Innovative Practices Track: What's Next for Automotive: Where and How to Improve Field Test and Enhance SoC Safety., , , , , , , , , and . VTS, page 1. IEEE, (2022)On-chip Electromigration Sensor for Silicon Lifecycle Management of Nanoscale VLSI., , , , and . ETS, page 1-4. IEEE, (2023)