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Disambiguation of "Repossi, Matteo"

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A Multi-Standard 1.5 to 10 Gb/s Latch-Based 3-Tap DFE Receiver With a SSC Tolerant CDR for Serial Backplane Communication.

, , , , , , , , , and . IEEE J. Solid State Circuits, 44 (4): 1306-1315 (2009)

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Matteo Garavoglia

Matteo Rini

Matteo Gabba

Matteo Bertini

Marco Matteo

 

Other publications of authors with the same name

A 24GHz Sub-Harmonic Receiver Front-End with Integrated Multi-Phase LO Generation in 65nm CMOS., , , and . ISSCC, page 216-217. IEEE, (2008)Design of Low-Loss Transmission Lines in Scaled CMOS by Accurate Electromagnetic Simulations., , , , and . IEEE J. Solid State Circuits, 44 (9): 2605-2615 (2009)23.4 A 56Gb/s 300mW silicon-photonics transmitter in 3D-integrated PIC25G and 55nm BiCMOS technologies., , , , , and . ISSCC, page 404-405. IEEE, (2016)A 25Gb/s 3D-integrated silicon photonics receiver in 65nm CMOS and PIC25G for 100GbE optical links., , , , , , and . ISCAS, page 2334-2337. IEEE, (2016)A 26-Gb/s 3-D-Integrated Silicon Photonic Receiver in BiCMOS-55 nm and PIC25G With - 15.2-dBm OMA Sensitivity., , , , , and . ESSCIRC, page 187-190. IEEE, (2019)A 12Gb/s 39dB loss-recovery unclocked-DFE receiver with bi-dimensional equalization., , , , , , , , and . ISSCC, page 164-165. IEEE, (2010)A wideband mm-Wave CMOS receiver for Gb/s communications employing interstage coupled resonators., , , , , , , , and . ISSCC, page 220-221. IEEE, (2010)22.9 A 1310nm 3D-integrated silicon photonics Mach-Zehnder-based transmitter with 275mW multistage CMOS driver achieving 6dB extinction ratio at 25Gb/s., , , , , , and . ISSCC, page 1-3. IEEE, (2015)A 25Gb/s low noise 65nm CMOS receiver tailored to 100GBASE-LR4., , , , , , and . ESSCIRC, page 221-224. IEEE, (2012)A Wideband Receiver for Multi-Gbit/s Communications in 65 nm CMOS., , , , , , , , , and . IEEE J. Solid State Circuits, 46 (3): 551-561 (2011)