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A Low-Variation Nonlinear Neuron Circuit., , , and . Journal of Circuits, Systems, and Computers, 8 (4): 447-451 (1998)Memory architecture of a video-rate image convolver., , and . ICASSP, page 1203-1206. IEEE, (1982)A two-dimensional finite field processor for image filtering., and . ICASSP, page 1140-1143. IEEE, (1981)Models for VLSI implementation of residue number system arithmetic modules., , and . IEEE Symposium on Computer Arithmetic, page 174-182. IEEE Computer Society, (1983)Software techniques for programming a general purpose data flow signal processor., , , and . ICASSP, page 1641-1644. IEEE, (1985)Systolic ROM arrays for implementing RNS FIR filters., , and . ICASSP, page 771-774. IEEE, (1987)A MEMS custom micropackaging solution., , and . ISCAS (3), page 938-941. IEEE, (2003)A MEMS implementation of an acoustical sensor array., , , and . ISCAS (2), page 273-276. IEEE, (2001)A systolic (VLSI) array using RNS for digital signal processing applications., , and . ACM Conference on Computer Science, page 115-120. ACM, (1984)Design and VLSI Implementation of a Unified Synapse-Neuron Architecture., , , and . Great Lakes Symposium on VLSI, page 228-233. IEEE Computer Society, (1996)