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Low-power realization of FIR filters on programmable DSPs., , and . IEEE Trans. Very Large Scale Integr. Syst., 6 (4): 546-553 (1998)RAMAN: A Re-configurable and Sparse tinyML Accelerator for Inference on Edge., , , , , , and . CoRR, (2023)Challenges in the Design of Embedded Real-time DSP SoCs.. VLSI Design, page 507-511. IEEE Computer Society, (2004)Integrated IC design approach based on software engineering paradigm., and . CICC, page 53-56. IEEE, (1999)Bi-Modal DRAM Cache: Improving Hit Rate, Hit Latency and Bandwidth., , , and . MICRO, page 38-50. IEEE Computer Society, (2014)Multivoltage scheduling with voltage-partitioned variable storage., , and . ISLPED, page 298-301. ACM, (2003)FDT-a design tool for switched capacitor filters., , , , , and . ICCAD, page 446-449. IEEE Computer Society, (1989)Session 14 overview: Deep-learning processors., , and . ISSCC, page 236-237. IEEE, (2017)A 28nm programmable and low power ultra-HD video codec engine., , , , , , and . ISCAS, page 558-561. IEEE, (2014)F1: Designing secure systems: Manufacturing, circuits and architectures., , , , , , and . ISSCC, page 492-494. IEEE, (2016)