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An enhanced sentiment dictionary for domain adaptation with multi-domain dataset in Tamil language (ESD-DA)., , and . Soft Comput., 25 (5): 3697-3711 (2021)Approximate quasi-delay-insensitive asynchronous adders: Design and analysis., , and . MWSCAS, page 1196-1199. IEEE, (2017)Comments on "Dual-rail asynchronous logic multi-level implementation".. CoRR, (2018)Hardware Efficient Approximate Adder Design., and . TENCON, page 806-810. IEEE, (2018)Majority and Minority Voted Redundancy for Safety-Critical Applications., , and . MWSCAS, page 1102-1105. IEEE, (2018)Asynchronous Early Output Dual-Bit Full Adders Based on Homogeneous and Heterogeneous Delay-Insensitive Data Encoding., and . CoRR, (2017)Low power self-timed carry lookahead adders., , , , and . MWSCAS, page 457-460. IEEE, (2013)Designing Hypermedia Applications., , and . HICSS (3), page 354-365. IEEE Computer Society, (1994)On the Error Resiliency of Combinational Logic Cells - Implications for Nano-based Digital Design., and . PRDC, page 118-119. IEEE Computer Society, (2013)A study on the impact of macroeconomic factors on S&P BSE Bankex returns., and . ICACCI, page 2614-2618. IEEE, (2016)