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Disambiguation of "Herdian, Hans"

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24.3 A 236-to-266GHz 4-Element Amplifier-Last Phased-Array Transmitter in 65nm CMOS.

, , , , , , , , , , , , , , , , , , and . ISSCC, page 415-417. IEEE, (2024)

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Ana Hanstedt

Beurteilung der Entwicklungskompetenz boviner Oozyten aus Follikeln mit unterschiedlicher Durchblutung der Follikelwand. TierH Hannover, (2009)

Flemming Hansen

Standards in der sozialen Arbeit. Uni Kassel, (2009)

Patrick Hansen

Entwicklung eines energetischen Sanierungsmodells für den europäischen Wohngebäudesektor unter dem Aspekt der Erstellung von Szenarien für Energie- und Co_1tn2-Einsparpotenziale bis 2030. Uni Siegen, (2009)

Ralf Hanschen

Sophie Hansen

 

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A Ka-Band Deployable Active Phased Array Transmitter Fabricated on 4-Layer Liquid Crystal Polymer Substrate for Small-Satellite Mount., , , , , , , , , and 4 other author(s). IEEE Access, (2023)0.2mW 70Fsrms-Jitter Injection-Locked PLL Using De-Sensitized SSPD-Based Injecting-Time Self-Alignment Achieving -270dB FoM and -66dBc Reference Spur., , , , , , and . VLSI Circuits, page 38-. IEEE, (2019)A Power-Efficient Pulse-VCO for Chip-Scale Atomic Clock., , , , , , and . IEICE Trans. Electron., 102-C (4): 276-286 (2019)32.7 A 32kHz-Reference 2.4GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth., , , , , , , , , and 1 other author(s). ISSCC, page 454-456. IEEE, (2021)Ultra-Low-Power Atomic Clock for Satellite Constellation with 2.2×10-12 Long-Term Allan Deviation Using Cesium Coherent Population Trapping., , , , , , , , and . ISSCC, page 462-464. IEEE, (2019)FPGA implementation of template matching using binary sum of absolute difference., , and . ICSET, page 13-17. IEEE, (2016)ULPAC: A Miniaturized Ultralow-Power Atomic Clock., , , , , , , , , and . IEEE J. Solid State Circuits, 54 (11): 3135-3148 (2019)Dual-Layer Proton Irradiation for Creating Thermally-Stable High-Resistivity Region in Si CMOS Substrate., , , , , and . ESSDERC, page 191-194. IEEE, (2021)A Sub-THz Full-Duplex Phased-Array Transceiver With Self-Interference Cancellation and LO Feedthrough Suppression., , , , , , , , , and 6 other author(s). IEEE J. Solid State Circuits, 59 (4): 978-992 (April 2024)A 32-kHz-Reference 2.4-GHz Fractional-N Oversampling PLL With 200-kHz Loop Bandwidth., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 56 (12): 3741-3755 (2021)