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SRAM Write- and Performance-Assist Cells for Reducing Interconnect Resistance Effects Increased with Technology Scaling.

K. Cho, H. Choi, I. Jung, J. Oh, T. Oh, K. Kim, G. Kim, T. Choi, C. Sim, T. Song, and S. Jung. VLSI Circuits, page 1-2. IEEE, (2021)

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Song Song

Song-Hak Song-Schreff

Song Gao

Peng Song

Other publications of authors with the same name

Switching pMOS Sense Amplifier for High-Density Low-Voltage Single-Ended SRAM.H. Jeong, T. Kim, K. Kang, T. Song, G. Kim, H. Won, and S. Jung. IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (6): 1555-1563 (2015)Offset-Compensated Cross-Coupled PFET Bit-Line Conditioning and Selective Negative Bit-Line Write Assist for High-Density Low-Power SRAM.H. Jeong, T. Kim, Y. Yang, T. Song, G. Kim, H. Won, and S. Jung. IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (4): 1062-1070 (2015)A Cross-layer Cognitive Radio Testbed for the Evaluation of Spectrum Sensing Receiver and Interference Analysis.J. Park, K. Kim, T. Song, S. Lee, J. Hur, K. Lim, and J. Laskar. CrownCom, page 1-6. IEEE, (2008)Design Rule Evaluation Framework Using Automatic Cell Layout Generator for Design Technology Co-Optimization.K. Jo, S. Ahn, J. Do, T. Song, T. Kim, and K. Choi. IEEE Trans. Very Large Scale Integr. Syst., 27 (8): 1933-1946 (2019)An Embedded Level-Shifting Dual-Rail SRAM for High-Speed and Low-Power Cache.T. Kim, H. Jeong, J. Park, H. Kim, T. Song, and S. Jung. IEEE Access, (2020)Trip-Point Bit-Line Precharge Sensing Scheme for Single-Ended SRAM.H. Jeong, T. Kim, T. Song, G. Kim, and S. Jung. IEEE Trans. Very Large Scale Integr. Syst., 23 (7): 1370-1374 (2015)A Fully Integrated UHF-Band CMOS Receiver With Multi-Resolution Spectrum Sensing (MRSS) Functionality for IEEE 802.22 Cognitive Radio Applications.J. Park, T. Song, J. Hur, S. Lee, J. Choi, K. Kim, K. Lim, C. Lee, H. Kim, and J. Laskar. IEEE J. Solid State Circuits, 44 (1): 258-268 (2009)Bitline Charge-Recycling SRAM Write Assist Circuitry for $V_MIN$ Improvement and Energy Saving.H. Jeong, S. Oh, T. Oh, H. Kim, C. Park, W. Rim, T. Song, and S. Jung. IEEE J. Solid State Circuits, 54 (3): 896-906 (2019)SRAM Write- and Performance-Assist Cells for Reducing Interconnect Resistance Effects Increased with Technology Scaling.K. Cho, H. Choi, I. Jung, J. Oh, T. Oh, K. Kim, G. Kim, T. Choi, C. Sim, T. Song and 1 other author(s). VLSI Circuits, page 1-2. IEEE, (2021)A 0.65V embedded SDRAM with smart boosting and power management in a 45nm CMOS technology.S. Pyo, J. Kim, J. Kim, H. Jung, T. Song, C. Lee, G. Kim, Y. Lee, and K. Kim. CICC, page 1-4. IEEE, (2012)

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Disambiguation of "Song, Taejoong"

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SRAM Write- and Performance-Assist Cells for Reducing Interconnect Resistance Effects Increased with Technology Scaling.

Please choose a person to relate this publication to

Song Song

Song Song

Song-Hak Song-Schreff

Song Gao

Peng Song

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Song, Taejoong"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML SRAM Write- and Performance-Assist Cells for Reducing Interconnect Resistance Effects Increased with Technology Scaling.

Please choose a person to relate this publication to

Song Song

Song Song

Song-Hak Song-Schreff

Song Gao

Peng Song

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

SRAM Write- and Performance-Assist Cells for Reducing Interconnect Resistance Effects Increased with Technology Scaling.