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Hardware Object Selection for Mapping Loops onto Reconfigurable Architectures.

, and . PDPTA, page 1104-1110. CSREA Press, (1999)

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DRIVE: An Interpretive Simulation and Visualization Environment for Dynamically Reconfigurable Systems., and . FPL, volume 1673 of Lecture Notes in Computer Science, page 31-40. Springer, (1999)DEFACTO: A Design Environment for Adaptive Computing Technology., , , , , , and . IPPS/SPDP Workshops, volume 1586 of Lecture Notes in Computer Science, page 570-578. Springer, (1999)Multicast on Irregular Switch-Based Networks with Wormhole Routing., , and . HPCA, page 48-57. IEEE Computer Society, (1997)Mapping Loops onto Reconfigurable Architectures., and . FPL, volume 1482 of Lecture Notes in Computer Science, page 268-277. Springer, (1998)Dynamic Data Layouts for Cache-Conscious Factorization of DFT., , , and . IPDPS, page 693-702. IEEE Computer Society, (2000)Dynamic Precision Management for Loop Computations on Reconfigurable Architectures., and . FCCM, page 249-. IEEE Computer Society, (1999)Parallelizing DSP Nested Loops on Reconfigurable Architectures using Data Context Switching.. DAC, page 273-276. ACM, (2001)Loop Pipelining and Optimization for Run Time Reconfiguration., and . IPDPS Workshops, volume 1800 of Lecture Notes in Computer Science, page 906-915. Springer, (2000)Hardware Object Selection for Mapping Loops onto Reconfigurable Architectures., and . PDPTA, page 1104-1110. CSREA Press, (1999)