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Analysis and Modeling of Collaborative Execution Strategies for Heterogeneous CPU-FPGA Architectures.

S. Huang, L. Chang, I. Hajj, S. Gonzalo, J. Gómez-Luna, S. Chalamalasetti, M. El-Hadedy, D. Milojicic, O. Mutlu, D. Chen, and W. Hwu. ICPE, page 79-90. ACM, (2019)

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Feiqing Huang

Zhida Huang

Ying Huang

Haowei Huang

Haishi Huang

Other publications of authors with the same name

DTW-Based Subsequence Similarity Search on AMD Heterogeneous Computing Platform.S. Huang, G. Dai, Y. Sun, Z. Wang, Y. Wang, and H. Yang. HPCC/EUC, page 1054-1063. IEEE, (2013)PyLog: An Algorithm-Centric Python-Based FPGA Programming and Synthesis Flow.S. Huang, K. Wu, H. Jeong, C. Wang, D. Chen, and W. Hwu. FPGA, page 227-228. ACM, (2021)DistHD: A Learner-Aware Dynamic Encoding Method for Hyperdimensional Classification.J. Wang, S. Huang, and M. Imani. DAC, page 1-6. IEEE, (2023)Late Breaking Results: Scalable and Efficient Hyperdimensional Computing for Network Intrusion Detection.J. Wang, H. Chen, M. Issa, S. Huang, and M. Imani. DAC, page 1-2. IEEE, (2023)FPGA/DNN Co-Design: An Efficient Design Methodology for IoT Intelligence on the Edge.C. Hao, X. Zhang, Y. Li, S. Huang, J. Xiong, K. Rupnow, W. Hwu, and D. Chen. DAC, page 206. ACM, (2019)Near-Memory and In-Storage FPGA Acceleration for Emerging Cognitive Computing Workloads.A. Dhar, S. Huang, J. Xiong, D. Jamsek, B. Mesnet, J. Huang, N. Kim, W. Hwu, and D. Chen. ISVLSI, page 68-75. IEEE, (2019)Acceleration of the Pair-HMM Algorithm for DNA Variant Calling.G. Manikandan, S. Huang, K. Rupnow, W. mei W. Hwu, and D. Chen. FCCM, page 137. IEEE Computer Society, (2016)Accelerating Sparse Deep Neural Networks on FPGAs.S. Huang, C. Pearson, R. Nagi, J. Xiong, D. Chen, and W. Hwu. HPEC, page 1-7. IEEE, (2019)Towards Neural Phrase-based Machine Translation.P. Huang, C. Wang, S. Huang, D. Zhou, and L. Deng. ICLR (Poster), OpenReview.net, (2018)Chimera: A Hybrid Machine Learning-Driven Multi-Objective Design Space Exploration Tool for FPGA High-Level Synthesis.M. Yu, S. Huang, and D. Chen. IDEAL, volume 13113 of Lecture Notes in Computer Science, page 524-536. Springer, (2021)

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Disambiguation of "Huang, Sitao"

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Analysis and Modeling of Collaborative Execution Strategies for Heterogeneous CPU-FPGA Architectures.

Please choose a person to relate this publication to

Feiqing Huang

Zhida Huang

Ying Huang

Haowei Huang

Haishi Huang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Huang, Sitao"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Analysis and Modeling of Collaborative Execution Strategies for Heterogeneous CPU-FPGA Architectures.

Please choose a person to relate this publication to

Feiqing Huang

Zhida Huang

Ying Huang

Haowei Huang

Haishi Huang

Other publications of authors with the same name

Disambiguation

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URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Analysis and Modeling of Collaborative Execution Strategies for Heterogeneous CPU-FPGA Architectures.