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Disambiguation of "Yu, Chang-Hyo"

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A 36fps SXGA 3D Display Processor with a Programmable 3D Graphics Rendering Engine.

, , , , , , , and . ISSCC, page 276-602. IEEE, (2007)

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Hyo-Chang Nam

Yu-Sung Chang

Ta Yü Chang

Yu-Yen Chang

Yu-Chen Chang

 

Other publications of authors with the same name

An efficient texture cache for programmable vertex shaders., , and . ISCAS, IEEE, (2006)A Memory-Efficient Unified Early Z-Test., , and . IEEE Trans. Vis. Comput. Graph., 17 (9): 1286-1294 (2011)A 36 fps SXGA 3-D Display Processor Embedding a Programmable 3-D Graphics Rendering Engine., , , , , , , , , and . IEEE J. Solid State Circuits, 43 (5): 1247-1259 (2008)A 186-Mvertices/s 161-mW Floating-Point Vertex Processor With Optimized Datapath and Vertex Caches., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (10): 1369-1382 (2009)Tessellation-enabled shader for a bandwidth-limited 3D graphics engine., , , and . CICC, page 367-370. IEEE, (2008)A 186Mvertices/s 161mW Floating-Point Vertex Processor for Mobile Graphics Systems., , , and . CICC, page 579-582. IEEE, (2007)A hardware-like high-level language based environment for 3D graphics architecture exploration., , , , , , , , , and 3 other author(s). ISCAS (2), page 512-515. IEEE, (2003)A hierarchical depth buffer for minimizing memory bandwidth in 3D rendering engine: Depth Filter., and . ISCAS (2), page 724-727. IEEE, (2003)An adaptive spatial filter for early depth test., and . ISCAS (2), page 137-140. IEEE, (2004)A 120Mvertices/s multi-threaded VLIW vertex processor for mobile multimedia applications., , , and . ISSCC, page 1606-1615. IEEE, (2006)