Author of the publication

A Stream System-on-Chip Architecture for High Speed Target Recognition Based on Biologic Vision.

, , , , , and . Asia-Pacific Computer Systems Architecture Conference, volume 4697 of Lecture Notes in Computer Science, page 256-267. Springer, (2007)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Optimizing OpenCL Implementation of Deep Convolutional Neural Network on FPGA., , , , , and . NPC, volume 10578 of Lecture Notes in Computer Science, page 100-111. Springer, (2017)Poster Abstract: A Template-based Framework for Generating Network Processor in FPGA., , , , and . INFOCOM Workshops, page 1057-1058. IEEE, (2019)A Stream System-on-Chip Architecture for High Speed Target Recognition Based on Biologic Vision., , , , , and . Asia-Pacific Computer Systems Architecture Conference, volume 4697 of Lecture Notes in Computer Science, page 256-267. Springer, (2007)On-Chip Memory System Optimization Design for the FT64 Scientific Stream Accelerator., , , , , , , , , and . IEEE Micro, 28 (4): 51-70 (2008)Unified Virtual Memory Support for Deep CNN Accelerator on SoC FPGA., , , , and . ICA3PP (1), volume 9528 of Lecture Notes in Computer Science, page 64-76. Springer, (2015)SAT: A Stream Architecture Template for Embedded Applications., , , , , and . CIT, page 1711-1718. IEEE Computer Society, (2010)Enabling a Uniform OpenCL Device View for Heterogeneous Platforms., , , , , , and . IEICE Trans. Inf. Syst., 98-D (4): 812-823 (2015)Fully Distributed On-chip Instruction Memory Design for Stream Architecture Based on Field-Divided VLIW Compression., , , , and . HPCC-ICESS, page 25-32. IEEE Computer Society, (2012)Tiled Multi-Core Stream Architecture., , , , , , and . Trans. High Perform. Embed. Archit. Compil., (2011)Efficient Multiple-Precision and Mixed-Precision Floating-Point Fused Multiply-Accumulate Unit for HPC and AI Applications., , , , , and . ICA3PP, volume 13777 of Lecture Notes in Computer Science, page 642-659. Springer, (2022)