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Design, implementation and analysis of a run-time configurable Memory Management Unit on FPGA.

, , , and . NORCAS, page 1-8. IEEE, (2015)

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Topology optimization for application-specific networks-on-chip., , , and . SLIP, page 53-60. ACM, (2004)Multicore Software-Defined Radio Architecture for GNSS Receiver Signal Processing., , , and . EURASIP J. Embed. Syst., (2009)Applying CDMA Technique to Network-on-Chip., , and . IEEE Trans. Very Large Scale Integr. Syst., 15 (10): 1091-1100 (2007)Design, implementation and analysis of a run-time configurable Memory Management Unit on FPGA., , , and . NORCAS, page 1-8. IEEE, (2015)FPGA implementation and integration of a reconfigurable CAN-based co-processor to the coffee risc processor., , , and . NORCAS, page 1-6. IEEE, (2016)Accelerating Computation on an Android Phone with OpenCL Parallelism and Optimizing Workload Distribution between a Phone and a Cloud Service., , and . UIC/ATC/ScalCom/CBDCom/IoP/SmartWorld, page 636-642. IEEE Computer Society, (2016)Energy and power estimation of Coarse-Grain Reconfigurable Array based Fast Fourier Transform accelerators., , , and . ReCoSoC, page 1-4. IEEE, (2012)Implementation of the W-CDMA cell search on a MPSOC designed for software defined radios., , , , and . SiPS, page 030-035. IEEE, (2009)Issues in the development of a practical NoC: the Proteo concept., , and . Integr., 38 (1): 95-105 (2004)Integration issues of a run-time configurable memory management unit to a RISC processor on FPGA., , , and . Microprocess. Microsystems, (2017)