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Digital signal propagation on a wafer-scale smart active programmable interconnect.

, , , , and . ICECS, page 1059-1062. IEEE, (2008)

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A multi-measurements RO-TDC implemented in a Xilinx field programmable gate array., , and . ISCAS, page 1-4. IEEE, (2017)Software rendering methods to display wafer scale integrated circuit dataset., , and . CCECE, page 1-4. IEEE, (2013)A novel spatially configurable differential interface for an electronic system prototyping platform., , , and . Integr., (2016)A configurable analog buffer dedicated to a wafer-scale prototyping platform of electronic systems., , and . LASCAS, page 1-4. IEEE, (2013)Acceleration of the Secure Hash Algorithm-256 (SHA-256) on an FPGA-CPU Cluster Using OpenCL., , and . ISCAS, page 1-5. IEEE, (2021)Propagating analog signals through a fully digital network on an electronic system prototyping platform., , , and . ISCAS, page 1983-1986. IEEE, (2012)Thermo-mechanical analysis of a reconfigurable wafer-scale integrated circuit., , , , , , , and . ICECS, page 315-318. IEEE, (2010)Digital signal propagation on a wafer-scale smart active programmable interconnect., , , , and . ICECS, page 1059-1062. IEEE, (2008)Multi-Phase Hybrid Boost Converter with High Conduction Loss Reduction and Fast Dynamic Response for Automotive Applications., , , and . NEWCAS, page 183-187. IEEE, (2022)A 3.3 V 0.1-1 A Hybrid Buck-Boost Converter with 85-97 % Power Efficiency Range Highly-Suited for Battery-Powered Devices using Low-Profile High-DCR Inductor., , , and . NEWCAS, page 303-307. IEEE, (2022)