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Disambiguation of "Hayes, John P."

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High-level design verification of microprocessors via error modeling.

, , , , and . ACM Trans. Design Autom. Electr. Syst., 3 (4): 581-599 (1998)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Matthew John Hayes

John P Burrows

John P Brown

John P Broussard

John P Dickson

 

Other publications of authors with the same name

On the role of timing masking in reliable logic circuit design., , and . DAC, page 924-929. ACM, (2008)Introduction to stochastic computing and its challenges.. DAC, page 59:1-59:3. ACM, (2015)On the Role of Sequential Circuits in Stochastic Computing., and . ACM Great Lakes Symposium on VLSI, page 475-478. ACM, (2017)Retraining and Regularization to Optimize Neural Networks for Stochastic Computing., , , and . ISVLSI, page 246-251. IEEE, (2020)Hierarchical test generation using precomputed tests for modules., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 9 (6): 594-603 (1990)Survey of Stochastic Computing., and . ACM Trans. Embed. Comput. Syst., 12 (2s): 92:1-92:19 (2013)Connective Fault Tolerance in Multiple-Bus Systems., and . IEEE Trans. Parallel Distributed Syst., 8 (6): 574-586 (1997)Optimizing Stochastic Circuits for Accuracy-Energy Tradeoffs., , , , and . ICCAD, page 178-185. IEEE, (2015)Structural fault tolerance in VLSI-based systems., and . Great Lakes Symposium on VLSI, page 50-55. IEEE, (1994)An Array Layout Methodology for VLlSI Circuits., and . IEEE Trans. Computers, 35 (12): 1055-1067 (1986)