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10: 4 MUX and 4: 10 DEMUX gearbox LSI for 100-gigabit Ethernet link.

, , , , , , , , , , , , , , и . ISSCC, стр. 148-150. IEEE, (2011)

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Ryo Sugihara

Rena Nemoto

Ryo Kohsaka

Shino Nemoto

Jong Won Ryoo

 

Другие публикации лиц с тем же именем

10: 4 MUX and 4: 10 DEMUX gearbox LSI for 100-gigabit Ethernet link., , , , , , , , , и 5 other автор(ы). ISSCC, стр. 148-150. IEEE, (2011)An 8Gb/s Transceiver with 3×-Oversampling 2-Threshold Eye-Tracking CDR Circuit for -36.8dB-loss Backplane., , , , , , , , , и 1 other автор(ы). ISSCC, стр. 98-99. IEEE, (2008)A 12.3mW 12.5Gb/s complete transceiver in 65nm CMOS., , , , , , , и . ISSCC, стр. 368-369. IEEE, (2010)A 10-Gb/s Receiver With Track-and-Hold-Type Linear Phase Detector and Charge-Redistribution First-Order ΔΣ Modulator in 90-nm CMOS., , , , , , , , и . IEEE J. Solid State Circuits, 44 (12): 3539-3546 (2009)10Gb/s receiver with track-and-hold-type linear phase detector and charge-redistribution 1st-order ΔΣ modulator., , , , , , , и . ISSCC, стр. 186-187. IEEE, (2009)A 12.3-mW 12.5-Gb/s Complete Transceiver in 65-nm CMOS Process., , , , , , , , и . IEEE J. Solid State Circuits, 45 (12): 2838-2849 (2010)A 10: 4 MUX and 4: 10 DEMUX Gearbox LSI for 100-Gigabit Ethernet Link., , , , , , , , , и 7 other автор(ы). IEEE J. Solid State Circuits, 46 (12): 3101-3112 (2011)