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Disambiguation of "Yamashita, Hiroki"

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A 10-Gb/s Receiver With Track-and-Hold-Type Linear Phase Detector and Charge-Redistribution First-Order ΔΣ Modulator in 90-nm CMOS.

, , , , , , , , and . IEEE J. Solid State Circuits, 44 (12): 3539-3546 (2009)

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Hiroki Takahashi

Hiroki Kawamura

Hiroki Sumizawa

Kiyonobu Yamashita

Miki Yamashita

 

Other publications of authors with the same name

A 25-to-28 Gb/s High-Sensitivity (-9.7 dBm) 65 nm CMOS Optical Receiver for Board-to-Board Interconnects., , , , , and . IEEE J. Solid State Circuits, 49 (10): 2259-2276 (2014)Low-light color image enhancement via iterative noise reduction using RGB/NIR sensor., , and . J. Electronic Imaging, 26 (4): 43017 (2017)A 1.2Gb/s write driver with pre-emphasis overshoot control optimized for high density HDD applications., , , , , and . CICC, page 519-522. IEEE, (2005)A 50-Gb/s NRZ-modulated optical transmitter based on a DFB-LD and a 0.18-µm SiGe BiCMOS LD driver., , , , , , , , , and 2 other author(s). OFC, page 1-3. IEEE, (2015)Enhancing low-light color images using an RGB-NIR single sensor., , and . VCIP, page 1-4. IEEE, (2015)High-frequency circuit design for 25 Gb/s×4 optical transceiver., , , and . ASP-DAC, page 648-651. IEEE, (2013)A 50-Gb/s Optical Transmitter Based on a 25-Gb/s-Class DFB-LD and a 0.18-µm SiGe BiCMOS LD Driver., , , , , , and . IEICE Trans. Electron., 99-C (9): 1039-1047 (2016)10: 4 MUX and 4: 10 DEMUX gearbox LSI for 100-gigabit Ethernet link., , , , , , , , , and 5 other author(s). ISSCC, page 148-150. IEEE, (2011)An 8Gb/s Transceiver with 3×-Oversampling 2-Threshold Eye-Tracking CDR Circuit for -36.8dB-loss Backplane., , , , , , , , , and 1 other author(s). ISSCC, page 98-99. IEEE, (2008)Compact and power-efficient 100-Gbps CMOS-based transceiver., , , , , , , , , and 6 other author(s). OFC/NFOEC, page 1-3. IEEE, (2013)