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3D IC Packaging Utilizing a Metal Structure for Heat Reduction, Noise Shielding, and High Interconnect Density., and . ISQED, page 269-274. IEEE, (2021)Automatic Design and Yield Enhancement of Data Converters., , and . Journal of Circuits, Systems, and Computers, 26 (1): 1750018:1-1750018:19 (2017)Three-Dimensional Pipeline ADC Utilizing TSV/ Design Optimization and Memristor Ratioed Logic., , , and . IEEE Trans. Very Large Scale Integr. Syst., 26 (12): 2619-2627 (2018)A performance-aware I/O interface for 3D stacked memory systems., , , and . UEMCON, page 369-371. IEEE, (2017)Yield-aware sizing of pipeline ADC using a multiple-objective evolutionary algorithm., , and . I. J. Circuit Theory and Applications, 45 (6): 744-763 (2017)High-performance RF-interconnect for 3D stacked memory., , , , and . ISOCC, page 109-110. IEEE, (2017)Evolving More Testable Digital Combinational Circuits., , and . CDES, page 40-45. CSREA Press, (2010)A 3D flash ADC structure for high-speed communication applications., , , and . CCWC, page 956-958. IEEE, (2018)Design of a Pre-Distortion Power Amplifier for Ku-Band/5G Applications., , , and . EIT, page 808-811. IEEE, (2018)Low-power and high-performance 2.4 GHz RF transmitter for biomedical application., , , and . UEMCON, page 389-391. IEEE, (2017)