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A DRC-based algorithm for extraction of critical areas for opens in large VLSI circuits., , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 18 (2): 151-162 (1999)IF polyphase filter design and calibration with back-gate biasing in 28 nm FD-SOI technology., , и . MIXDES, стр. 334-338. IEEE, (2015)Hierarchical Analysis of Short Defects between Metal Lines in CMOS IC., , , , , и . DSD, стр. 729-734. IEEE Computer Society, (2008)Yield Estimation of VLSI Circuits with Downscaled Layouts.. DFT, стр. 55-60. IEEE Computer Society, (1999)The integrated transmitter and receiver modules for pulse oximeter system., , , , , , , и . MIXDES, стр. 243-248. IEEE, (2016)Low voltage LNA implementations in 90 nm CMOS technology for multistandard GNSS., , и . DDECS, стр. 78-83. IEEE Computer Society, (2009)PVT tolerant LC-VCO in 90 nm CMOS technology for GPS/Galileo applications., , и . DDECS, стр. 29-34. IEEE Computer Society, (2011)Built-In Current Monitor for IDDQ Testing in CMOS 90 nm Technology., , , и . DDECS, стр. 259-262. IEEE Computer Society, (2008)LC-VCO design automation tool for nanometer CMOS technology., , и . DDECS, стр. 68-73. IEEE, (2012)NaviSoC: High-Accuracy Low-Power GNSS SoC with an Integrated Application Processor., , , , , , , , , и 2 other автор(ы). Sensors, 20 (4): 1069 (2020)