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Disambiguation of "Martina, Maurizio"

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HW-FlowQ: A Multi-Abstraction Level HW-CNN Co-design Quantization Methodology.

, , , , , , , , , and . ACM Trans. Embed. Comput. Syst., 20 (5s): 66:1-66:25 (2021)

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Maurizio Podda

Maurizio Zanazzi

Maurizio Venturini

Maurizio Serva

Maurizio Podda

 

Other publications of authors with the same name

A power-scalable motion estimation coprocessor for energy constrained applications., , , and . ISSPA (2), page 603-604. IEEE, (2003)0-7803-7946-2.Turbo NOC: a framework for the design of Network On Chip based turbo decoder architectures, and . CoRR, (2009)A Low Cost ALS and VLC Circuit for Solid State Lighting., and . ApplePies, page 461-467. Springer, (2018)Mind the Scaling Factors: Resilience Analysis of Quantized Adversarially Robust CNNs., , , , , , , and . DATE, page 706-711. IEEE, (2022)System on chip.. Polytechnic University of Turin, Italy, (2004)A Low Cost Open Platform for Development and Performance Evaluation of IoT and IIoT Systems., and . ApplePies, volume 1110 of Lecture Notes in Electrical Engineering, page 155-161. Springer, (2023)A Low Cost Compact Output Amplifier for Multichannel Muscle Stimulation., and . ApplePies, volume 866 of Lecture Notes in Electrical Engineering, page 293-299. Springer, (2021)NASCaps: A Framework for Neural Architecture Search to Optimize the Accuracy and Hardware Efficiency of Convolutional Capsule Networks., , , , , and . ICCAD, page 114:1-114:9. IEEE, (2020)Hardware architecture for CRYSTALS-Kyber post-quantum cryptographic SHA-3 primitives., , and . PRIME, page 209-212. IEEE, (2023)A Multi-Precision Bit-Serial Hardware Accelerator IP for Deep Learning Enabled Internet-of-Things., , and . MWSCAS, page 192-197. IEEE, (2021)