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Disambiguation of "Breuer, Melvin A."

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The POTATO chip architecture: a study in tradeoffs for signal processing chip design.

, , , , , and . ICCD, page 508-513. IEEE, (1988)

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Melvin D'Anastasi

Melvin Fried

Melvin Hoyer

Melvin Rea

Melvin Lippe

 

Other publications of authors with the same name

Procedures for Eliminating Static and Dynamic Hazards in Test Generation., and . IEEE Trans. Computers, 23 (10): 1069-1078 (1974)On Area and Yield Considerations for Fault-Tolerant VLSI Processor Arrays., and . IEEE Trans. Computers, 33 (1): 21-27 (1984)Test Schedules for VLSI Circuits Having Built-In Test Hardware., and . IEEE Trans. Computers, 35 (4): 361-367 (1986)Roving Emulation as a Fault Detection Mechanism., and . IEEE Trans. Computers, 35 (11): 933-939 (1986)Scan Path with Look Ahead Shifting (SPLASH)., and . ITC, page 696-704. IEEE Computer Society, (1986)A Note on Three-Valued Logic Simulation.. IEEE Trans. Computers, 21 (4): 399-402 (1972)Functional Partitioning and Simulation of Digital Circuits.. IEEE Trans. Computers, 19 (11): 1038-1046 (1970)Generation of optimal code for expressions via factorization.. Commun. ACM, 12 (6): 333-340 (1969)An O(n) algorithm for width determination of power/ground routes for VLSI circuits., and . Integr., 4 (4): 345-355 (1986)SIESTA: a multi-facet scan design system., , , and . EURO-DAC, page 246-251. IEEE Computer Society Press, (1992)