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Disambiguation of "Hegt, Hans"

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A femto-ampere sensitive direct-interface current-input sigma delta ADC for amperometric bio-sensor signal acquisition.

, , , and . BioCAS, page 1-4. IEEE, (2015)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Walentina Hegt

Ana Hanstedt

Beurteilung der Entwicklungskompetenz boviner Oozyten aus Follikeln mit unterschiedlicher Durchblutung der Follikelwand. TierH Hannover, (2009)

Flemming Hansen

Standards in der sozialen Arbeit. Uni Kassel, (2009)

Patrick Hansen

Entwicklung eines energetischen Sanierungsmodells für den europäischen Wohngebäudesektor unter dem Aspekt der Erstellung von Szenarien für Energie- und Co_1tn2-Einsparpotenziale bis 2030. Uni Siegen, (2009)

Bert Hansky

 

Other publications of authors with the same name

An 11b Pipeline ADC With Parallel-Sampling Technique for Converting Multi-Carrier Signals., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 59-I (5): 906-914 (2012)On the stability of high order Sigma-Delta modulators., , and . ICECS, page 1383-1386. IEEE, (2001)Smart AD and DA converters., , , , , , and . ISCAS (4), page 4062-4065. IEEE, (2005)Predictive timing error calibration technique for RF current-steering DACs., , and . ISCAS, page 228-231. IEEE, (2008)A high performance license plate recognition system., , and . SMC, page 4357-4362. IEEE, (1998)Recognition of Real-Life Character Samples using a Structural Variation and Degradation Model., and . ICDAR, page 225-228. IEEE Computer Society, (1999)Sigma-delta modulators operating at a limit cycle., , and . IEEE Trans. Circuits Syst. II Express Briefs, 53-II (5): 399-403 (2006)A 14 bit 200 MS/s DAC With SFDR > 78 dBc, IM3 < - 83 dBc and NSD < - 163 dBm/Hz Across the Whole Nyquist Band Enabled by Dynamic-Mismatch Mapping., , , , , , and . IEEE J. Solid State Circuits, 46 (6): 1371-1381 (2011)Digital post-correction of front-end track-and-hold circuits in ADCs., , , and . ISCAS, IEEE, (2006)Limit cycle counting based smart background calibration of continuous time sigma delta ADCs., , , and . ISCAS, page 722-725. IEEE, (2014)