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Process-Variation-Aware Adaptive Cache Architecture and Management., , , , , , and . IEEE Trans. Computers, 58 (7): 865-877 (2009)An Accuracy Tunable Non-Boolean Co-Processor Using Coupled Nano-Oscillators., , , , , and . ACM J. Emerg. Technol. Comput. Syst., 14 (1): 1:1-1:28 (2018)Power Analysis Attack Resistance Engineering by Dynamic Voltage and Frequency Scaling., , , , , and . ACM Trans. Embed. Comput. Syst., 11 (3): 62:1-62:16 (2012)X-VS: Crossbar-Based Processing-in-Memory Architecture for Video Summarization., , , and . ISVLSI, page 592-597. IEEE, (2020)Java Runtime Systems: Characterization and Architectural Implications., , , , , and . IEEE Trans. Computers, 50 (2): 131-146 (2001)Nonvolatile Processor Architecture Exploration for Energy-Harvesting Applications., , , , , , and . IEEE Micro, 35 (5): 32-40 (2015)Energy Efficient and Reliable System Design.. VLSI-SOC, page 6-9. Technische Universität Darmstadt, Insitute of Microelectronic Systems, (2003)Cognitive cameras: Assistive vision systems., , , and . CASES, page 188. IEEE, (2015)LATTE: Low-power Audio Transform with TrueNorth Ecosystem., , , , , , , , , and . IJCNN, page 4270-4277. IEEE, (2016)Using Memory Compression for Energy Reduction in an Embedded Java System., , , , and . Journal of Circuits, Systems, and Computers, 11 (5): 537-556 (2002)