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NoC-Sprinting: Interconnect for Fine-Grained Sprinting in the Dark Silicon Era.

, , and . DAC, page 160:1-160:6. ACM, (2014)

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Exploring memory controller configurations for many-core systems with 3D stacked DRAMs., , , and . ISQED, page 565-570. IEEE, (2015)Crosstalk-Aware Energy Efficient Encoding for Instruction Bus through Code Compression., and . SoCC, page 193-196. IEEE, (2006)Leakage Optimized DECAP Design for FPGAs., , , , and . APCCAS, page 960-963. IEEE, (2006)Reliability-aware Co-synthesis for Embedded Systems., , , , and . VLSI Signal Processing, 49 (1): 87-99 (2007)Taming Unstructured Sparsity on GPUs via Latency-Aware Optimization., and . DAC, page 1-6. IEEE, (2020)3D-SWIFT: a high-performance 3D-stacked wide IO DRAM., , , , and . ACM Great Lakes Symposium on VLSI, page 51-56. ACM, (2014)Power and performance of read-write aware Hybrid Caches with non-volatile memories., , , , and . DATE, page 737-742. IEEE, (2009)DLUX: A LUT-Based Near-Bank Accelerator for Data Center Deep Learning Training Workloads., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (8): 1586-1599 (2021)Π-RT: A Runtime Framework to Enable Energy-Efficient Real-Time Robotic Vision Applications on Heterogeneous Architectures., , , , , and . Computer, 54 (4): 14-25 (2021)Boosting Night-time Scene Parsing with Learnable Frequency., , , , , , and . CoRR, (2022)