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Mapping functional connectivity of bursting neuronal networks., , , and . Appl. Netw. Sci., (2017)A combined IEEE half and single precision floating point multipliers for deep learning., and . ACSSC, page 1038-1042. IEEE, (2017)Clarifications and Optimizations on Rounding for IEEE-compliant Floating-Point Multiplication., , and . ASAP, page 1-8. IEEE Computer Society, (2018)PR-HMPSoC: A versatile partially reconfigurable heterogeneous Multiprocessor System-on-Chip for dynamic FPGA-based embedded systems., and . FPL, page 1-6. IEEE, (2014)QoS-Aware Cross-Layer Reliability-Integrated FPGA-Based Dynamic Partially Reconfigurable System Partitioning., , , and . FPT, page 230-233. IEEE, (2018)Maximizing the Serviceability of Partially Reconfigurable FPGA Systems in Multi-tenant Environment., and . FPGA, page 29-39. ACM, (2020)Towards Safer Operations: An Expert-involved Dataset of High-Pressure Gas Incidents for Preventing Future Failures., , , , , and . EMNLP (Industry Track), page 509-521. Association for Computational Linguistics, (2023)Lifetime-aware design methodology for dynamic partially reconfigurable systems., , , and . ASP-DAC, page 393-398. IEEE, (2018)XNoC: A non-intrusive TDM circuit-switched Network-on-Chip., and . FPL, page 1-11. IEEE, (2016)PRFloor: An Automatic Floorplanner for Partially Reconfigurable FPGA Systems., and . FPGA, page 149-158. ACM, (2016)