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Error Detection Using Dynamic Dataflow Verification.

, and . PACT, page 104-118. IEEE Computer Society, (2007)

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Nostradamus: Low-cost hardware-only error detection for processor cores., and . DATE, page 1-6. European Design and Automation Association, (2014)Dynamic Verification of Memory Consistency in Cache-Coherent Multithreaded Computer Architectures., and . IEEE Trans. Dependable Secur. Comput., 6 (1): 18-31 (2009)Reducing the impact of intra-core process variability with criticality-based resource allocation and prefetching., , , and . Conf. Computing Frontiers, page 129-138. ACM, (2008)NANA: A nano-scale active network architecture., , , and . JETC, 2 (1): 1-30 (2006)A Primer on Memory Consistency and Cache Coherence, Second Edition, , , and . Synthesis Lectures on Computer Architecture Morgan & Claypool Publishers, (2020)Online diagnosis of hard faults in microprocessors., , and . ACM Trans. Archit. Code Optim., 4 (2): 8 (2007)AMVA techniques for high service time variability., , and . SIGMETRICS, page 217-228. ACM, (2000)Timestamp snooping: an approach for extending SMPs., , , , , , , , , and . ASPLOS, page 25-36. ACM Press, (2000)Dynamic Verification of Sequential Consistency., and . ISCA, page 482-493. IEEE Computer Society, (2005)Core cannibalization architecture: improving lifetime chip performance for multicore processors in the presence of hard faults., and . PACT, page 43-51. ACM, (2008)