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Disambiguation of "Moreira, Matheus Trevisan"

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Beware the Dynamic C-Element.

, , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (7): 1644-1647 (2014)

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Daniela Trevisan

Rüdiger Matheus

Enrico Trevisan

Jochen Matheus

Ricarda Matheus

 

Other publications of authors with the same name

Asynchronous circuits: innovations in components, cell libraries and design templates.. Pontifícia Universidade Católica do Rio Grande do Sul, Brazil, (2016)ndltd.org (oai:tede2.pucrs.br:tede/6635).Spatially Distributed Dual-Spacer Null Convention Logic Design., , , and . J. Low Power Electron., 10 (3): 313-320 (2014)Design and analysis of the HF-RISC processor targeting voltage scaling applications., , , , , , and . SBCCI, page 1-6. IEEE, (2016)Blade - A Timing Violation Resilient Asynchronous Template., , , , , , , , , and . ASYNC, page 21-28. IEEE Computer Society, (2015)A High-Level Modeling Framework for Estimating Hardware Metrics of CNN Accelerators., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 68 (11): 4783-4795 (2021)A QDI Interconnect for 3D Systems Using Industry Standard EDA and Cell Libraries., , , , and . ASYNC, page 58-59. IEEE, (2023)Validating an Automated Asynchronous Synthesis Environment with a Challenging Design: RISC-V., , , , and . SBCCI, page 1-6. IEEE, (2023)A Bundled-Data Asynchronous Circuit Synthesis Flow Using a Commercial EDA Framework., , and . DSD, page 79-86. IEEE Computer Society, (2015)Chronos Link: A QDI Interconnect for Modern SoCs., and . ASYNC, page 67-68. IEEE, (2020)Static Differential NCL Gates: Toward Low Power., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 62-II (6): 563-567 (2015)