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Scalable Boolean Methods in a Modern Synthesis Flow., , , , , , , , and . DATE, page 1643-1648. IEEE, (2019)A Hybrid Method for Spectral Translation Equivalent Boolean Functions., , and . PACRIM, page 1-6. IEEE, (2019)Scalable Generic Logic Synthesis: One Approach to Rule Them All., , , , , , and . DAC, page 70. ACM, (2019)SAT-Sweeping Enhanced for Logic Synthesis., , , , , , , , and . DAC, page 1-6. IEEE, (2020)A Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks., , , , and . IACR Cryptol. ePrint Arch., (2020)Extending Boolean Methods for Scalable Logic Synthesis., , , , , , and . IEEE Access, (2020)Majority logic synthesis., , , , , and . ICCAD, page 79. ACM, (2018)LUT-Based Optimization For ASIC Design Flow., , , , , , , , and . DAC, page 871-876. IEEE, (2021)Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic : (Special Session Paper)., , , , , , and . DATE, page 133-138. IEEE, (2020)Size Optimization of MIGs with an Application to QCA and STMG Technologies., , , , and . NANOARCH, page 157-162. ACM, (2018)