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Synthesis of low-leakage PD-SOI circuits with body-biasing., , , and . ISLPED, page 287-290. ACM, (2001)Nanomagnetic Logic Microprocessor: Hierarchical Power Model., , and . IEEE Trans. Very Large Scale Integr. Syst., 21 (8): 1410-1420 (2013)On the functional test of the BTB logic in pipelined and superscalar processors., , , , , and . LATW, page 1-6. IEEE Computer Society, (2013)ToPoliNano: nanoarchitectures design made real., , , , , and . NANOARCH, page 160-167. ACM, (2012)Effects of Temperature in Deep-Submicron Global Interconnect Optimization., , , , and . PATMOS, volume 2799 of Lecture Notes in Computer Science, page 90-100. Springer, (2003)A Block-Based Approach for SoC Global Interconnect Electrical Parameters Characterization., , , , and . PATMOS, volume 2799 of Lecture Notes in Computer Science, page 121-130. Springer, (2003)An Experimental VLSI Prolog Interpreter: Preliminary Measurements and Results., , , and . ISCA, page 117-126. (1987)Domain Wall Interconnections for NML., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (11): 3067-3076 (2017)Dynamic Gap Selector: A Smith Waterman Sequence Alignment Algorithm with Affine Gap Model Optimization., , , , , and . IWBBIO, page 1347-1358. Copicentro Editorial, (2014)Bitmap Index: A Processing-in-Memory Reconfigurable Implementation., , , , , , and . ApplePies, volume 627 of Lecture Notes in Electrical Engineering, page 173-179. Springer, (2019)