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Efficient Design and Implementation of Energy Detection-Based Spectrum Sensing., , and . Circuits Syst. Signal Process., 38 (11): 5187-5211 (2019)Modeling of FPGA Local/Global Interconnect Resources and Derivation of Minimal Test Configurations., , and . DFT, page 284-292. IEEE Computer Society, (2002)Soft-decision decoding of convolutional codes with square-law detectors., and . IET Commun., 7 (10): 966-972 (2013)An Artificial Neural Network Processor With a Custom Instruction Set Architecture for Embedded Applications., , and . IEEE Trans. Circuits Syst., 67-I (12): 5200-5210 (2020)Design and Implementation of a Digital Secure Code-Shifted Reference UWB Transmitter and Receiver., and . IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (7): 1927-1936 (2017)A Compact Architecture for Simulation of Spatio-Temporally Correlated MIMO Fading Channels., and . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (4): 1280-1288 (2014)A Compact Single-FPGA Fading-Channel Simulator., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 55-II (1): 84-88 (2008)A Reconfigurable Hardware Architecture for Principal Component Analysis., and . Circuits Syst. Signal Process., 38 (5): 2097-2113 (2019)Two-dimensional sorting algorithm for high-throughput K-best MIMO detection., and . IET Commun., 11 (6): 817-822 (2017)Accurate multiple-input multiple-output fading channel simulator using a compact and highthroughput reconfigurable architecture., , and . IET Commun., 5 (6): 844-852 (2011)