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System Level Comparison of 3D Integration Technologies for Future Mobile MPSoC Platform.

, , , , , , and . IEEE Embed. Syst. Lett., 6 (4): 85-88 (2014)

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Concepts and Implementation of Spatial Division Multiplexing for Guaranteed Throughput in Networks-on-Chip., , , , and . IEEE Trans. Computers, 57 (9): 1182-1195 (2008)Exploring the security landscape: NoC-based MPSoC to Cloud-of-Chips., , , , , and . Microprocess. Microsystems, (2021)Implementation of W-CDMA Cell Search on a FPGA Based Multi-Processor System-on-Chip with Power Management., , , , and . SAMOS, volume 5657 of Lecture Notes in Computer Science, page 88-97. Springer, (2009)A Framework Introducing Model Reversibility in SoC Design Space Exploration., , , and . SAMOS, volume 4599 of Lecture Notes in Computer Science, page 211-221. Springer, (2007)Techniques Optimizing the Number of Processors to Schedule Multi-threaded Tasks., , , and . ECRTS, page 321-330. IEEE Computer Society, (2012)Power, Performance, Area and Cost Analysis of Memory-on-Logic Face-to-Face Bonded 3D Processor Designs., , , , , , , and . ISLPED, page 1-6. IEEE, (2021)Exploring Energy Reduction in Future Technology Nodes via Voltage Scaling with Application to 10nm., , , , , and . PDP, page 184-191. IEEE Computer Society, (2016)Template architectures for highly scalable, many-core Heterogeneous SoC: Could-of-Chips., , and . ReCoSoC, page 1-7. IEEE, (2018)Impact of gate-level clustering on automated system partitioning of 3D-ICs., , , , and . CoRR, (2023)Implementation of W-CDMA Cell Search on a Highly Parallel and Scalable MPSoC., , , , and . J. Signal Process. Syst., 64 (1): 137-148 (2011)