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Disambiguation of "Perkowski, Marek A."

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Decomposition of Multiple-Valued Relations .

, , , , , , , , and . ISMVL, page 13-18. IEEE Computer Society, (1997)

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Dawid Perkowski

Sybille Perkowski

Nicolas Perkowski

Katja Marek

Rekonstruktion und Kulturgesellschaft. Uni Kassel, (2009)

Andrea Marek

 

Other publications of authors with the same name

Free Kronecker decision diagrams and their application to Atmel 6000 series FPGA mapping., and . EURO-DAC, page 8-13. IEEE Computer Society, (1994)A Minimal Universal Test Set for Self-Test of EXOR-Sum-of-Products Circuits., , and . IEEE Trans. Computers, 49 (3): 267-276 (2000)A Comprehensive Approach to Logic Synthesis and Physical Design for Two-Dimensional Logic Arrays., , , and . DAC, page 321-326. ACM Press, (1994)A Cost Minimization Approach to Synthesis of Linear Reversible Circuits., and . CoRR, (2014)Quantum ternary parallel adder/subtractor with partially-look-ahead carry., and . J. Syst. Archit., 53 (7): 453-464 (2007)Quantum Machine Learning, Logic Minimization, and Circuit Design by Optimizing Ternary-Input Binary-Output Kronecker Reed-Muller Forms., , and . FLAP, 9 (3): 733-780 (2022)Quantum Algorithms for Unate and Binate Covering Problems with Application to Finite State Machine Minimization., and . FLAP, 10 (6): 993-1023 (2023)Term Trees in Application to an Effective and Efficient ATPG for AND-EXOR and AND-OR Circuits., , and . VLSI Design, 14 (1): 107-122 (2002)Multi-Level Logic Synthesis Based on Kronecker Decision Diagrams and Boolean Ternary Decision Diagrams for Incompletely Specified Functions., , , and . VLSI Design, 3 (3-4): 301-313 (1995)Quantum-based algorithm and circuit design for bounded Knapsack optimization problem., and . Quantum Inf. Comput., 20 (9&10): 766-786 (2020)