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Accelerating Graph and Machine Learning Workloads Using a Shared Memory Multicore Architecture with Auxiliary Support for In-hardware Explicit Messaging.

, , , , , and . IPDPS, page 254-264. IEEE Computer Society, (2017)

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Accelerating Synchronization Using Moving Compute to Data Model at 1, 000-core Multicore Scale., , , and . ACM Trans. Archit. Code Optim., 16 (1): 4:1-4:27 (2019)GPU concurrency choices in graph analytics., and . IISWC, page 178-187. IEEE Computer Society, (2016)POSTER: Exploiting Multi-Level Task Dependencies to Prune Redundant Work in Relax-Ordered Task-Parallel Algorithms., , , and . PACT, page 495-496. IEEE, (2019)In-Hardware Moving Compute to Data Model to Accelerate Thread Synchronization on Large Multicores., , , and . IEEE Micro, 40 (1): 83-92 (2020)HeteroMap: A Runtime Performance Predictor for Efficient Processing of Graph Analytics on Heterogeneous Multi-Accelerators., , , and . ISPASS, page 268-281. IEEE, (2019)Efficient parallelization of path planning workload on single-chip shared-memory multicores., , and . HPEC, page 1-6. IEEE, (2015)HaTCh: Hardware Trojan Catcher., , , , , and . IACR Cryptology ePrint Archive, (2014)A performance predictor for implementation selection of parallelized static and temporal graph algorithms., , and . Concurr. Comput. Pract. Exp., (2022)Accelerating Synchronization in Graph Analytics Using Moving Compute to Data Model on Tilera TILE-Gx72., , , and . ICCD, page 496-505. IEEE Computer Society, (2018)GraphTuner: An Input Dependence Aware Loop Perforation Scheme for Efficient Execution of Approximated Graph Algorithms., , and . ICCD, page 201-208. IEEE Computer Society, (2017)