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A Virtual CMOS Library Approach for East Layout Synthesis., , and . VLSI, volume 162 of IFIP Conference Proceedings, page 415-426. Kluwer, (1999)Congestion-aware task mapping in heterogeneous MPSoCs., and . SoC, page 1-4. IEEE, (2008)Current mask generation: a transistor level security against DPA attacks., , , , , , and . SBCCI, page 115-120. ACM, (2005)Interconnection Length Estimation at Logic-Level., , and . SBCCI, page 98-102. IEEE Computer Society, (2001)LASCA-Interconnect Parasitic Extraction Tool for Deep-Submicron IC Design., , and . SBCCI, page 327-332. IEEE Computer Society, (2000)Exploring the Impact of Soft Errors on NoC-based Multiprocessor Systems., , , , , and . ISCAS, page 1-5. IEEE, (2018)SPP-NIDS - A Sea of Processors Platform for Network Intrusion Detection Systems., , , , and . IEEE International Workshop on Rapid System Prototyping, page 27-33. IEEE Computer Society, (2007)Runtime fault recovery protocol for NoC-based MPSoCs., , , , and . ISQED, page 132-139. IEEE, (2014)Flow oriented routing for NOCS., and . SoCC, page 367-370. IEEE, (2010)Topology-agnostic fault-tolerant NoC routing method., , , and . DATE, page 1595-1600. EDA Consortium San Jose, CA, USA / ACM DL, (2013)