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Disambiguation of "Wada, Hiroki"

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Complex Bandpass DeltaSigmaAD Modulator Architecture without I, Q-Path Crossing Layout.

, , , , , , , , , , , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 89-A (4): 908-915 (2006)

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Hiroki Takahashi

Hiroshi Wada

Hiroki Kawamura

Eitaro Wada

Hiroki Sumizawa

 

Other publications of authors with the same name

A DFT method for RTL circuits to achieve complete fault efficiency based on fixed-control testability., , , and . ASP-DAC, page 331-334. ACM, (2001)Evaluation of the Response Characteristics of On-Chip Gel Actuators for Various Single Cell Manipulations., , , and . IEEE Robotics Autom. Lett., 5 (4): 5205-5212 (2020)Lift-off Process of On-chip Micro-Gel Actuator for Cell Manipulations., , , and . MHS, page 1. IEEE, (2022)A 2.8-V Multibit Complex Bandpass Delta-Sigma-AD Modulator in 0.18µm CMOS., , , , , , and . ASP-DAC, page 96-97. IEEE Computer Society, (2007)BIST Method Based on Concurrent Single-Control Testability of RTL Data Paths., , , and . Asian Test Symposium, page 313-318. IEEE Computer Society, (2001)Observer-Based Robust Stabilizing Controllers Based on the Trajectory for Polytopic Uncertain Systems., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 93-A (6): 1260-1265 (2010)Complex Bandpass DeltaSigmaAD Modulator Architecture without I, Q-Path Crossing Layout., , , , , , , , , and 5 other author(s). IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 89-A (4): 908-915 (2006)A non-scan DFT method at register-transfer level to achieve complete fault efficiency., , , and . ASP-DAC, page 599-604. ACM, (2000)Design for Strong Testability of RTL Data Paths to Provide Complete Fault Efficiency., , , and . VLSI Design, page 300-305. IEEE Computer Society, (2000)A Second-Order Multibit Complex Bandpass DeltaSigmaAD Modulator with I, Q Dynamic Matching and DWA Algorithm., , , , , , , , , and 4 other author(s). IEICE Trans. Electron., 90-C (6): 1181-1188 (2007)