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A 4-Kb 1-to-8-bit Configurable 6T SRAM-Based Computation-in-Memory Unit-Macro for CNN-Based AI Edge Processors.

Y. Chiu, Z. Zhang, J. Chen, X. Si, R. Liu, Y. Tu, J. Su, W. Huang, J. Wang, W. Wei, J. Hung, S. Sheu, S. Li, C. Wu, R. Liu, C. Hsieh, K. Tang, и M. Chang. IEEE J. Solid State Circuits, 55 (10): 2790-2801 (2020)

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Zhang Zhang

Meng Zhang

Methods and implementations of road-network matchingM. Zhang. TU München, (2009)

Xianghui Zhang

Xianghong Zhang

Miao Zhang

Другие публикации лиц с тем же именем

A 55nm 1-to-8 bit Configurable 6T SRAM based Computing-in-Memory Unit-Macro for CNN-based AI Edge Processors.Z. Zhang, J. Chen, X. Si, Y. Tu, J. Su, W. Huang, J. Wang, W. Wei, Y. Chiu, J. Hong и 6 other автор(ы). A-SSCC, стр. 217-218. IEEE, (2019)15.5 A 28nm 64Kb 6T SRAM Computing-in-Memory Macro with 8b MAC Operation for AI Edge Chips.X. Si, Y. Tu, W. Huang, J. Su, P. Lu, J. Wang, T. Liu, S. Wu, R. Liu, Y. Chou и 17 other автор(ы). ISSCC, стр. 246-248. IEEE, (2020)STICKER-IM: A 65 nm Computing-in-Memory NN Processor Using Block-Wise Sparsity Optimization and Inter/Intra-Macro Data Reuse.J. Yue, Y. Liu, Z. Yuan, X. Feng, Y. He, W. Sun, Z. Zhang, X. Si, R. Liu, Z. Wang и 5 other автор(ы). IEEE J. Solid State Circuits, 57 (8): 2560-2573 (2022)A 4-Kb 1-to-8-bit Configurable 6T SRAM-Based Computation-in-Memory Unit-Macro for CNN-Based AI Edge Processors.Y. Chiu, Z. Zhang, J. Chen, X. Si, R. Liu, Y. Tu, J. Su, W. Huang, J. Wang, W. Wei и 8 other автор(ы). IEEE J. Solid State Circuits, 55 (10): 2790-2801 (2020)Recent Advances in Compute-in-Memory Support for SRAM Using Monolithic 3-D Integration.Z. Zhang, X. Si, S. Srinivasa, A. Ramanathan, и M. Chang. IEEE Micro, 39 (6): 28-37 (2019)Circuit Design Challenges in Computing-in-Memory for AI Edge Devices.X. Si, H. Qian, M. Chang, C. Xue, J. Su, Z. Zhang, S. Li, S. Sheu, H. Lee, P. Chen и 1 other автор(ы). ASICON, стр. 1-4. IEEE, (2019)A 6.54-to-26.03 TOPS/W Computing-In-Memory RNN Processor using Input Similarity Optimization and Attention-based Context-breaking with Output Speculation.R. Guo, H. Li, R. Liu, Z. Zhang, L. Tang, H. Sun, L. Liu, M. Chang, S. Wei, и S. Yin. VLSI Circuits, стр. 1-2. IEEE, (2021)15.2 A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips.J. Su, X. Si, Y. Chou, T. Chang, W. Huang, Y. Tu, R. Liu, P. Lu, T. Liu, J. Wang и 13 other автор(ы). ISSCC, стр. 240-242. IEEE, (2020)A Framework for Incremental Deep Web Crawler Based on URL Classification.Z. Zhang, G. Dong, Z. Peng, и Z. Yan. WISM (2), том 6988 из Lecture Notes in Computer Science, стр. 302-310. Springer, (2011)14.3 A 65nm Computing-in-Memory-Based CNN Processor with 2.9-to-35.8TOPS/W System Energy Efficiency Using Dynamic-Sparsity Performance-Scaling Architecture and Energy-Efficient Inter/Intra-Macro Data Reuse.J. Yue, Z. Yuan, X. Feng, Y. He, Z. Zhang, X. Si, R. Liu, M. Chang, X. Li, H. Yang и 1 other автор(ы). ISSCC, стр. 234-236. IEEE, (2020)

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Please choose a person to relate this publication to

Zhang Zhang

Meng Zhang

Xianghui Zhang

Xianghong Zhang

Miao Zhang

Другие публикации лиц с тем же именем

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