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Staticroute: A novel router for the Dynamic Partial Reconfiguration of FPGAS.

, , and . FPL, page 1-7. IEEE, (2013)

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Reducing the overhead of dynamic partial reconfiguration for multi-mode circuits., , and . FPT, page 282-283. IEEE, (2014)A novel tool flow for increased routing configuration similarity in multi-mode circuits., , , and . ISVLSI, page 96-101. IEEE Computer Socity, (2013)Automating Reconfiguration Chain Generation for SRL-Based Run-Time Reconfiguration., , , and . ARC, volume 7199 of Lecture Notes in Computer Science, page 1-12. Springer, (2012)An automatic tool flow for the combined implementation of multi-mode circuits., , , and . DATE, page 821-826. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Memory-Efficient and Fast Run-Time Reconfiguration of Regularly Structured Designs., , , and . FPL, page 171-176. IEEE Computer Society, (2011)TPaR: Place and Route Tools for the Dynamic Reconfiguration of the FPGA's Interconnect Network., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 33 (3): 370-383 (2014)RecoNoC: A reconfigurable network-on-chip., , , , and . ReCoSoC, page 1-2. IEEE, (2011)Staticroute: A novel router for the Dynamic Partial Reconfiguration of FPGAS., , and . FPL, page 1-7. IEEE, (2013)Enabling FPGA routing configuration sharing in dynamic partial reconfiguration., , , , and . Des. Autom. Embed. Syst., 19 (1-2): 189-221 (2015)Automatic tool flow for shift-register-LUT reconfiguration: making run-time reconfiguration fast and easy (abstract only)., , , and . FPGA, page 287. ACM, (2010)